Kontron COMe-cSP2 Manuel d'utilisateur télécharger pdf (Page 43)

COMe-cSP2 / COMe-cSP2 Connector

Zero Delay Clock Buffer

The use of a zero delay clock buffer leads to problems because it needs approximatley 60 clock cycles before the clock

is present on the output. The Intel® USB15W System Controller Hub typically detects if a device is connected to the

LPC clock, but it will not wait the 60 clock cycles to stay active.

Clk1

Clk2

0 delay buffer

Clk1

Clk2

…….

60 clock cycles

AD[0...3]

...

Warning: Do not use the reference schematic in the COM Express® Design Guide. Either use another Clock Buffer

solution without a long start up process or use series resistors to double the LPC clock line. Follow the design

recommendations in the COM Express Design Guide maintained by PICMG.

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Kontron COMe-cSP2 Manuel d'utilisateur Page 43