Preface CP6002
Page vi ID 1036-6431, Rev. 3.0
P R E L I M I N A R Y
4.3 I/O Address Map ......................................................................................4 - 6
4.4 CP6002-Specific Registers ......................................................................4 - 7
4.4.1 Status Register 0 (STAT0) ...............................................................4 - 7
4.4.2 Status Register 1 (STAT1) ...............................................................4 - 8
4.4.3 Control Register 0 (CTRL0) ............................................................4 - 9
4.4.4 Control Register 1 (CTRL1) ............................................................4 - 9
4.4.5 Device Protection Register (DPROT) ............................................4 - 10
4.4.6 Reset Status Register (RSTAT) .....................................................4 - 11
4.4.7 Board Interrupt Configuration Register (BICFG) ...........................4 - 12
4.4.8 Status Register 2 (STAT2) .............................................................4 - 13
4.4.9 Board ID High Byte Register (BIDH) .............................................4 - 13
4.4.10 Board and PLD Revision Register (BREV) ...................................4 - 14
4.4.11 Geographic Addressing Register (GEOAD) ..................................4 - 14
4.4.12 Watchdog Timer Control Register (WTIM) ....................................4 - 15
4.4.13 Board ID Low Byte Register (BIDL) ..............................................4 - 17
4.4.14 Debug LED Configuration Register (DLCFG) ...............................4 - 18
4.4.15 Debug LED Control Register (DLCTRL) .......................................4 - 19
4.5 BMC-Specific Registers .........................................................................4 - 20
4.5.1 IPMI Controller Status Register 0 (ICSTA0) ..................................4 - 20
4.5.2 IPMI Controller Status Register 1 (ICSTA1) ..................................4 - 21
4.5.3 IPMI Reset Status Register (IRSTA) .............................................4 - 22
4.5.4 IPMI Keyboard Controller Style Interface ......................................4 - 22
5. Power Considerations .............................................................5 - 3
5.1 System Power ..........................................................................................5 - 3
5.1.1 CP6002 Baseboard .........................................................................5 - 3
5.1.2 Backplane .......................................................................................5 - 4
5.1.3 Power Supply Units .........................................................................5 - 4
5.1.3.1 Start-Up Requirement .............................................................5 - 4
5.1.3.2 Power-Up Sequence ...............................................................5 - 4
5.1.3.3 Tolerance ................................................................................5 - 5
5.1.3.4 Regulation ...............................................................................5 - 5
5.2 Power Consumption ................................................................................5 - 6
(120 pages)
(9 pages)
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